Compaq AlphaServer ES40 Informations techniques télécharger pdf (Page 359)

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Registers D-1

Appendix D

Registers

This appendix describes 21264 (EV6) internal processor registers; 21272

(Tsunami/Typhoon) system support chipset registers; and dual-port RAM (DPR)

registers that are related to general logout frame errors. It also provides CPU

and system uncorrectable and correctable machine logout frames and error

state bit definitions of all the platform logout frame registers.

21264 (EV6) Registers

Ibox Status Register (I_STAT)

Memory Management Status Register (MM_STAT)

Dcache Status Register (DC_STAT)

Cbox Read Register

Exception Address Register (EXC_ADDR)

Interrupt Enable and Current Processor Mode Register (IER_CM)

Interrupt Summary Register (ISUM)

PAL Base Register (PAL_BASE)

Ibox Control Register (I_CTL)

Process Context Register (PCTX)

21272 (Tsunami/Typhoon) System Registers

21272-CA Cchip Miscellaneous Register (MISC)

21272-CA Device Interrupt Request Register (DIRn, n=0,1,2,3)

21272-CA Pchip Error Register (PERROR)

21272-CA Array Address Registers

DPR Registers

DPR Registers (for 680 correctable error state capture)

DPR Registers (for I

C bus)

DPR Registers (power supply status from I

C bus)

DPR 680 Fatal Registers (for 680 uncorrectable error state capture)

1 2 ... 354 355 356 357 358 359 360 361 362 363 364 ... 443 444

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Compaq AlphaServer ES40 Informations techniques Page 359

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